The present invention relates to semiconductor design, and more particularly, to an internal voltage generating circuit of a phase change random access memory device and a method thereof.
In general, a phase change random access memory (PRAM) denotes a phase change memory. The PRAM is also referred to as an Ovonic unified memory (OUM).
Cells of the PRAM and the OUM are made of a phase change material that sustains one of two states when the phase change material is cooled down after being heated up. Also, the phase change material changes its state again when the material is heated up or cooled down again. For example, chalocogenide alloy is a representative phase change material of the PRAM or the OUM.
Two states of the phase change material are a crystalline state and an amorphous state. The phase change material included in the PRAM or the OUM has characteristics in which a resistance becomes low when the phase change material is in the crystalline state and the resistance becomes high when the phase change material is in the amorphous state.
Therefore, a logic value 0 or 1 is determined based on a resistance value of the phase change material included in the PRAM or the OUM. That is, the crystalline state of the phase change material corresponds to a logic value 0, and the amorphous state of the phase change material corresponds to a reset or a logic value 1.
In order to make the phase change material of the PRAM or the OUM to be in the amorphous state, the phase change material is quickly cooled down after being heated up to be higher than a temperature of a melting point through a resistance heat. On the contrary, in order to make the phase change material to be in the crystalline state, the phase change material is cooled down slowly after being heated up to be lower than a temperature of a melting point.
Meanwhile, it is difficult to apply a sufficient current to a phase change material using a supply voltage in a programming operation of a phase change memory device such as a PRAM or an OUM. Therefore, it is required to use a boost voltage having a higher voltage level than a level of the supply voltage in order to apply sufficient current to phase change memory cells to perform a programming operation.
If a driver for performing a programming operation receives a current from a supply voltage when the programming operation is performed on cells of a phase change memory such as a PRAM or an OUM, a necessary voltage to select phase change cells may become insufficient due to a voltage drop caused by a parasitic resistance formed between phase change memory cells.
Therefore, it may be necessary to use a boost voltage having a higher level than a supply voltage to perform a programming operation of a phase change memory device.
On the contrary, use of a boost voltage may be avoided in performing a read operation and a standby operation because it is not necessary to directly change a phase change material to an amorphous state or a crystalline state. The use of the boost voltage may be a factor to waste unnecessary current in the read operation and the standby operation of the phase change memory device.
Furthermore, if a high voltage such as a boost voltage is continuously applied to internal circuits of a phase change memory, the lifespan thereof may be abruptly shortened. Therefore, it is preferable to reduce a time of exposing internal circuits of a phase change memory to a high voltage such as a boost voltage during a read operation and a standby operation except a programming operation mode that requires the boost voltage.